Block 2 — Signal Processing#
Turn a real-world signal into bits a computer can act on. We build the frequency domain and the four ideal filter types, model capacitors and inductors as complex resistors so every Block 1 tool keeps working, then build real filters out of R, L, and C. From there: sampling, aliasing, quantization, and the signal conditioning that makes a transducer fit an ADC — finishing with digital logic and finite state machines.
What you’ll learn#
2.1 — I can graph a given sinusoidal signal, including DC components, in both the time and frequency domains and determine its bandwidth.
2.2 — I can identify types of ideal filters, determine their cutoff frequencies, and analyze their output given an input sinusoidal signal or signal spectrum.
2.3 — I can model capacitors and inductors as complex resistors and use circuit analysis tools (such as voltage dividers, Ohm’s Law, and the power equation) to calculate voltage, current, and power in AC circuits containing these components.
2.4 — I can determine the filter type, gain, and cutoff frequency of simple series circuits containing a resistor, capacitor, and/or inductor.
2.5 — I can calculate the ADC sampling rate, voltage resolution, and digital output based on a given input voltage and the ADC’s operational parameters, and determine the number of bits a required resolution demands.
2.6 — I can implement signal conditioning to avoid aliasing and clipping and to ensure maximum compatibility of the dynamic ranges between two devices.
2.7 — I can relate digital inputs to digital outputs using tools such as fundamental digital logic gates (AND, OR, NOT), truth tables, and Sum of Products (SOP) and Product of Sums (POS) Boolean expressions.
2.8 — I can model Moore and Mealy Finite State Machines (FSMs) using tools such as state transition diagrams, transition tables, and combinational and sequential logic circuits.
In this block#
Frequency Domain and Ideal Filters
Time versus frequency, bandwidth, and the four ideal filter types. Objectives 2.1, 2.2.
Lesson 16Complex Math and Impedance
Rectangular and phasor form, the sinusoid-to-phasor transform, impedance, and why every Block 1 tool still works. Objective 2.3.
Lesson 17Analog Filters
Real filters, rolloff, the −3 dB point, and identifying filter type by inspection. Objective 2.4.
Lesson 18Midterm Review
Midterm logistics, the 1 / 0.5 / 0 rubric, and a refresher across Objectives 1.1–1.7 and 2.1–2.3.
Lesson 19Analog Filter Lab
Build an R-C filter and find its cutoff, swap the components, then hypothesize and test a third circuit.
Lesson 20Analog-to-Digital Conversion
Sampling and Nyquist, aliasing, quantization, resolution, the digital output value and its error, and what a recording costs in bits. Objective 2.5.
Lesson 21Signal Conditioning
Anti-aliasing, clipping, wasted dynamic range, and matching a transducer to an ADC. Objective 2.6.
Lesson 22ADC / Arduino Lab
Wire the Sharp IR sensor, apply the Objective 2.5 ADC math, and calibrate a voltage-to-distance conversion to ±0.5 cm — the range channel you reuse in Project 2.
Lesson 23Digital Logic
Logic gates, truth tables, and Sum of Products and Product of Sums expressions. Objective 2.7.
Lesson 24Finite State Machines I
Sequential versus combinational logic, Moore versus Mealy, diagrams and transition tables. Objective 2.8.
Lesson 25Finite State Machines II
The seven-step design process, logic equations from a table, and flip-flops. Objective 2.8.
Lesson 26Project 2 Workday 1
Project 2 begins — implement the SEARCH–DETECT–LOCK engagement FSM on your calibrated range channel.
Lesson 27Project 2 Workday 2
Wiring up the Moore telemetry and the Mealy FIRE, then rehearsing the engagement demo.
LabAnalog Filter Lab
Build low-pass and high-pass R-C filters, identify a mystery filter, and explore a two-element design.
LabADC / Arduino Lab
Characterize and calibrate an infrared distance sensor on the Arduino Due, then validate the conversion to ±0.5 cm.
ProjectProject 2 - Finite State Machines
Implement the SEARCH–DETECT–LOCK engagement FSM on the Arduino Due, driven by your calibrated range channel.