Concept Flashcards

Concept Flashcards#

1. What is the formula for ADC bit rate?
\[ \text{bit rate} = b f_s \]

where \(b\) is the number of bits per sample and \(f_s\) is the sampling frequency.

2. Why is bit rate important in ADC system design?

Bit rate determines required memory, bandwidth, and storage time for digital data.

3. What is the relationship between bits and bytes?
\[ 8\ \text{bits} = 1\ \text{byte} \]
4. What are the common binary-based memory conversions?
\[ 2^{10}\ \text{B} = 1\ \text{kB} \]
\[ 2^{20}\ \text{B} = 1\ \text{MB} \]
\[ 2^{30}\ \text{B} = 1\ \text{GB} \]
5. What are the two major signal-conditioning pitfalls in ADC systems?

  1. Aliasing

  2. Clipping

6. What causes aliasing?

Aliasing occurs when:

\[ f_s < 2f_{\text{High}} \]

The sampling rate is below the Nyquist rate.

7. How can aliasing be prevented?

  • Increase \(f_s\)

  • Add a low-pass (anti-aliasing) filter with

\[ f_c \le \frac{f_s}{2} \]
8. What is clipping?

Clipping occurs when the input signal exceeds the ADC dynamic range (\(V_{\min}\) to \(V_{\max}\)). The ADC outputs either all 0s or all 1s.

9. What is ADC resolution?
\[ \Delta V = \frac{V_{\max}-V_{\min}}{2^b} \]

Resolution is the smallest measurable voltage step.

10. Why must the transducer dynamic range match the ADC dynamic range?

To use the full resolution of the ADC and prevent clipping or wasted levels.

11. What is the purpose of a transducer interface?

To apply gain (\(K\)) and bias (\(B\)):

\[ v_{\text{out}} = K v_{\text{in}} + B \]

so that the input signal properly spans the ADC range.

12. How do you calculate required gain for symmetric ranges?
\[ K = \frac{V_{\text{ADC,max}}}{V_{\text{signal,max}}} \]

when both ranges are centered at 0 V.

13. How do you determine storage required for a given recording time?

  1. Compute bit rate: \(b f_s\)

  2. Convert bits to bytes

  3. Multiply by recording duration

  4. Convert to MB or GB

14. How do you determine recording time for a fixed memory size?
\[ \text{Time} = \frac{\text{Total storage (bits)}}{\text{bit rate}} \]
15. What engineering tradeoffs exist in ADC system design?

  • Higher \(f_s\) → more bandwidth and storage required

  • Larger \(b\) → better resolution but higher bit rate

  • Wider dynamic range → larger \(\Delta V\) (worse resolution)

ADC design balances aliasing prevention, resolution, and memory constraints.